PWM LED Dimmer
Step Motor Controller
Sound Generator: Part 1
Sound Generator: Part 2
Random Number Generator

How to play sound with APOLLO181 (Part 1): the hardware

A PWM signal, smoothed by a low pass filter, is the normal way to output an analogue signal from a processor; nevertheless, audio applications need speed and resolution, which are better achieved by a DAC functionality.


In early computers there were two basic techniques for playing sounds. 

Both were exhaustively described by Hal Chamberlin in the September 1977 issue of BYTE Magazine: “A sampling of techniques for computer performance of music”.


The first technique included schemes in which computer generates one monotonic note at a time, just varying frequency and duration. The algorithm is simple, based on a routine with two nestled loops: the first, inner loop, controls the frequency of the tone, while the second, outer loop, controls the duration. A train of rectangular waves is generated at the output of a single-bit port connected to the speaker driver circuit, which produces audible tones by turning continuously on-off the loudspeaker. Primary limitations are the narrow range of tone colours and restriction to monotonic performance.


The second technique (here adopted) covers systems where the computer synthesizes artificial and sampled sounds, expressed as strings of binary digits (0 or 1), which are reconstucted into analog signals by a DAC (Digital to Analog Converter): the DAC converts the binary strings into a voltage ramp to forms the audio signal that feeds the speaker circuit. The computer algorithm, which is generally very complex, is not limited to determine frequency and duration of the notes, but calculates their harmonic structure, amplitude and phase, generating different tones to the human ear.


Nowadays, in modern computers, prerecorded sampled sounds are already stored in large ROM (or other types of non-volatile memory, that cost much lesser than in the 1970's) and are immediately available to be converted into audio signals, without the need of complex algorithms and cumbersome computations.

APOLLO181's DAC is built upon a network of 10K Ohm resistors and the very old 741 Op-Amp

The 4-bit D/A converter


The first binary DAC was developed in the 1920s for facsimile and telegraph systems and was based on weighted resistors and relay switches. Since then, the architecture has remained popular and forms the backbone for modern precision and high-speed DACs. (source: Analog Devices T-015 TUTORIAL Basic DAC Architectures II: Binary DACs, by Walt Kester)


A basic 4-bit DAC, where the number of binary inputs is just four, can be built of a set of resistors (R, 2R, 4R and 8R), forming a voltage divider. The resistors are scaled to represent weights for the different input bits. This type of DAC is called "binary-weighted resistor DAC".


Since values of standard resistors are made up from a geometric sequence within each decade, the most efficient way to obtain doubling values in the voltage divider is by connecting identical resistors in parallel and in series. Thus, it is possible to use just one standard resistor value: in our circuit, R = 5kΩ (two 10kΩ resistors in parallel), 2R = 10kΩ (one single resistor), 4R = 20kΩ (two 10kΩ resistors in series) and 8R = 40kΩ (four 10kΩ resistors in series).

APOLLO181 DAC converts 4-bit binary data from Port 0 (latch 7475) into audible signals

This DAC is extremely simple because requires only few resistors and a nibble of data in input, which is more than adequate for our didactic purpose. In general, binary-weighted resistor DACs are not intrinsically monotonic and are hard to manufacture at higher resolutions because require large values of resistors, with necessary high precision. In addition, the output impedance of such DACs changes with the input code.


The output voltage from a DAC can change only by discrete amounts, corresponding to the level associated to one binary input bit change: the resistor with the lowest value R corresponds to the highest weighted binary input (Bit3 or MSB), and 2R, 4R, 8R correspond to the binary weights of Bit2, Bit1, and Bit0 (or LSB) respectively.


In general, the relationship between the digital nibble in input and the analog voltage in output is the following:


Vout = - 1/2 * Vref * [1 * Bit3 + 0.5 * Bit2 + 0.25 * Bit1 + 0.125 * Bit0 ]

where Vref is the Reference Voltage of the converter circuit.


Thus, a 4-bit converter can resolve 2^4 = 16 distinct analog levels. The following table shows the sixteen actual values of the output voltage of APOLLO181 DAC, measured at the connection of the emitter resistors in the push-pull stage:








































Due to the intrinsic finite resolution, any DAC exhibits a fundamental quantization error, equal to the difference between the desired analog value and the digital representation of that value. At loud signal levels, quantisation errors manifest themselves as a wideband noise, limiting the dynamic range; at low signal levels, they can manifest themselves as unwanted audible distortion.

The quantization error is determined by the number of bits which are used to code the signal, thus, if we increase the number of bits, the error will decrease.


A 4-bit DAC exhibits only 26 dB of dynamic range that is poor, but twice the minimum speech intelligibility threshold level: typically the speech sound must be 12 dB louder than the noise, for a good word recognition. (source: Sencore News: Measuring Speech Intelligibility with SoundPro October 05 by Glen Kropuenske). As a comparison, a vintage 78 RPM disc record (released in the first half of the 20th century) offered us about 30-40 dB of dynamic range, for an effective bit depth of only 5-6 bits.



Dynamic range (dB) = 6.02 * N + 1.76

where N is the number of bit of the converter.

Our DAC has to cover a frequency range at least equal to the frequency response of the employed magnetic speaker, which is in our case from about 350 to 3500 Hz. According to the Nyquist-Shannon sampling theorem, we calculate that, for no loss of information, a safe sampling rate, which satisfies the above bandwidth, is 8 kHz (which is wider than 3500*2=7000 Hz).

Sample Rate ≥ 2 * Max Signal Frequency

In effect, the bandwidth of most phone lines has been for many years only 4 kHz, as that was found to be the minimum needed for intelligible speech. To carry a typical phone call between two calling parties, the analog audio signal was digitized at 8 kHz sample rate with 8-bit resolution, and the call was then carried using a 64 kbit/s channel (originally designed by Bell Labs in 1962).


Captured by a FTT spectral analysis system
A 4-bit ~100 Hz sawtooth waveform sampled at 16x rate, as it is reproduced by Apollo181 DAC

Captured by a FTT spectral analysis sistem
A 4-bit ~330 Hz sawtooth wave sampled at 16x rate: the 16 steps are smoothed by the 4.7 nF capacitor

Captured by a FTT spectral analysis sistem
A 4-bit ~1 kHz sawtooth sampled at 16x rate: frequency-response of our DAC starts declining


A DAC generates at its output a sequence of rectangular pulses, typically a series of stair-steps, and this causes multiple harmonics above the Nyquist frequency, which is equal to half the sampling rate: these unwanted harmonics can be removed by limiting the bandwidth of the analog signal below one-half the sample rate. A good low pass filter smoothes the sharp transitions between samples and removes the harmonics above the Nyquist frequency. Such filter is also called "reconstruction filter".

The RC combination, in the feedback of the 741 operational amplifier, forms a first order low pass filter (-6 dB per octave), where the cutoff frequency is  f = 1/(2*π*R*C) = 1/(2*3.14*8.2k*4.7n) ~ 4 kHz, calculated as one-half the sampling rate which we have decided to use (i.e. 8 kHz).

The the term “cutoff frequency” usually means the frequency at which the filter is attenuating the signal by -3dB: this means that for low order filters there is a significant amount of filter response left outside of the defined passband. Thus, this filter implies rolling off some audio frequencies also below the cutoff frequency, making worse the frequency response of the DAC, at higher frequencies.


Also, DACs operate by holding constant the last voltage value until another sample is received, and this staircase-type output causes an intrinsic non flat frequency response at higher frequencies: the output frequency response rolls off according to sin(x)/x envelope and at 80% of Nyquist frequency (equal to one-half the sampling rate) DAC's output is inherently attenuated by -2.42 dB (source: Flatten DAC frequency response. By Ken Yang, Maxim Integrated Products - April 13, 2006, EDN magazine).


There are of course several circuital solutions available for compensating the above roll-off response, which, for semplicity, weren't implemented here.

In the next section we compute algorithms under APOLLO181 that generates tones and chords, adding together sinusoidal waveforms, digitized at 8000 samples per second and using 4 bits per sample.

(Continue to Part 2)


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